Samsung’s Next Exynos Chips Will Be Designed By Artificial Intelligence

chip design

Samsung continues surprising us. Recently, it issued a statement saying the next generation of mobile phone chips will be designed using AI.

As Wired reported, Samsung will use the AI ​​function ( provided by Synopsys to design the next-generation Exynos processor.

FYI, Exynos chips are used in Samsung’s smartphones and tablets (mainly in the Korean and European markets).

Synopsys is one of the world’s largest suppliers of chip design software (EDA). The chairman of this company said that is the first commercial AI software for processor design.

However, we should note that Samsung won’t delegate all the work to AI. Instead, it will use reinforcement learning to automatically search the design space to find the best solution.

How Are Mobile Phone Chips Made?

A chip must first complete its logic design part, which is completed by human engineers. After that, the manufacturer starts the layout and routing design to determine the placement of each transistor and how to connect them.

However, modern chips generally have billions or even tens of billions of transistors. That’s why the design layout and testing usually take 20 to 30 weeks to complete.

Faced with “countless kinds of” choices, the final layout design needs to achieve the trade-offs before the three goals of performance, power consumption, and area (ie, PPA). The chip design may have 10⁹⁰⁰⁰⁰ possibilities.

Engineers have an instinctive understanding of how different designs will make chips. But this understanding is difficult to write into computer code. It is similar to reinforcement learning.

chip design

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Note: Reinforcement learning trains algorithms through rewards or penalties. is what they need. This approach is similar to AlphaZero.

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AlphaZero learns to play Go and Chess through AI self-games. learns how to make optimal decisions through a large data stream generated by a computer, and finds more reliable design solutions in a shorter time during the learning process.

chip design has significantly improved design speed. Synopsys said that this tool has increased chip frequency by 18% in some cases, reduced power consumption by 21%, and shortened engineering time from six months to one month.

Moreover, AI will continue to self-learn to improve its capabilities. So longer it works, smarter it becomes. This means, in future it will design chips faster.

In addition to Synopsys, some companies are also developing their own chip design AI tools. Among them, the most well-known are Google and Nvidia. In addition, another EDA manufacturer Cadence also recently launched an AI design tool.

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